Forum Discussion
Altera_Forum
Honored Contributor
14 years agoThe primary files you are missing is the .SDC file and the .QSF file.
The .SDC contains the timing constraints and can be recreated if you know the timing requirements of the design. The .QSF file contains all the quartus settings for the compile, include what files were called, and the IO assignments for the design. This too can be re-generated by just starting a new project with the files and adding all the source files, and defining the pinout. If there were some advanced features used to meet timing, like logic locks etc, those would be lost, but you should be able to generate a POF fairly easily. Pete