What happened to vhdl.org?

I'm trying to use fixed point arithmetic. :) I'm porting an old DSP algorithm to an FPGA and would like to avoid using floating point because it awfully bloats my FPGA.

I still have David Bishop's user’s guide here and in there on page 1 he writes to use these two files:

use ieee.fixed_float_types.all; -- ieee_proposed for vhdl-93 version

use ieee.fixed_pkg.all; -- ieee_proposed for compatibility version

So I used the ones with the same name that come with Modelsim and it seems to do what it is supposed to do in simulation.

For synthesis it apparently doesn't work like that.

Probably I should have added that I get the same error for fixed_pkg.