Forum Discussion
Are you talking about exported interfaces or interfaces that are simply not connected to other components in the system?
Exported interfaces are normally connected to something outside the system, like another part of your Quartus project or to I/O pins. Interfaces that are not exported don't all have to be connected to something. If they are unconnected, the unused logic is optimized away. This happens in the HDL that is created from the system generation process.
I'm not sure why you think this is "mind boggling". Synthesis does this whenever you compile a design whether you use Platform Designer or not. The only difference is that the HDL code from the tool gets written this way as opposed to how the post-synthesis netlist is built (though the subsequent post-synthesis netlist will obviously also be missing this logic because it won't be in the HDL).
If you are referring specifically to an input, if for some reason the logic cannot be optimized away and the input value is required, you would most likely get a warning.