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Altera_Forum
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12 years ago

Weird VHDL Multiplier Problem

Hello all, I was recently given reign over a DE0-Nano board by my research adviser to turn into a interference fringe counter of sorts but I am having some problems programming multiplication in V...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

Contrary to Kaz' and Dave's suggestions, you don't need to create a synchronous process.

For a combinatorial process Quartus II will complain about a, a_reg, b_reg not being in the sensitivity list but will produce a valid circuit. Modelsim will keep silent about the sensitivity list but may fail to simulate correctly (IMHO).

Is this the exact code of your project, or a write-up? It would be interesting to see all the code.