Honored Contributor
Honored ContributorThis talks a bit about them:
http://www.alterawiki.com/wiki/the_quartus_ii_fitter_and_seed_sweeps Quickly put, the solution space is enormous, and so the smallest change in your design will cause variance in the final fit. The seed is the one thing in the project you can change and don't care about it's value, so it's an easy way to perturb the design and get a different result. So let's say running multiple seeds, your design runs at 103MHz on average, with a variance of +/-4Mhz. So let's say 1/10 seeds doesn't meet timing. So if you occasionally have one that doesn't meet timing, running another seed most likely will fix it. But if your design only meets timing 1/10, you're much better off doing something to the design to try and close timing with something that gets it to consistently meet timing. I've run many designs with the PCIe HIP in it without problems. Obviously check if something broke in the path compared to what you would normally expect. I often create a separate project with just the core and see if it meets timing. If it does, compare the failing critical path to the stand-alone project and see what's different. Feel free to take the critical path, run: report_timing -setup -npaths 10 -detail full_path -panel_name "Critical_paths" -file "TQ/TQ_10paths.txt" and post it if you want someone to take a quick look.
