Forum Discussion
Abe
Frequent Contributor
6 years agoThe simulation does not work due to the inherent behavior of the JK master slave FF:
- If CLK is low at the start, the outputs Q and Qb will be X irrespective of the state of J and K.
- If CLk is high at the start and J=0 and K=1, the outputs will still be X. (K input is also Reset for SR flop which is used to build the JK master-slave)
To get the simulation working,
- Shift the clock edge by some x ns so that it starts HIGH.
- Assign J =1 and K = 0 , this is the set condition for the FF.
- Follow the rest of the JK FF truth table.
TGuo0
New Contributor
6 years agoThanks for the clarification! Unfortunately, when I tried your suggestions, the same result came out. Is there something I'm missing?