Forum Discussion
Altera_Forum
Honored Contributor
14 years agoI feel you are not familiar with Modelsim as you always used quartus internal simulator.
I can not describe so long over here but just little in brief i can direct you. As you said you have created a block and now wanna simulate it so in quartus click on file-->create/update-->create HDL design files from the current files then it will ask your preferred language (i.e. verilog or vhdl..it's upto you) Choose your language and it will create that file for you in project directory Then you open modelsim and create new project and add that (.vhd or .v) file to you project and now you are ready for the simulation in modelsim. If you havent tried modelsim yet,this thing wil be little difficult for u to understand totally. So you read http://www.altera.com/literature/hb/qts/qts_qii53001.pdf and read also modelsim help guide. I think you will get an idea. :) :) :) :)