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Altera_Forum
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18 years ago

Warning: Converting TRI node that feeds logic to an OR gate

I am in the process of upgrading from QII 5.0 to QII 7.1 and I am facing some problems. My design is fairly large. One of the modules that I know is not working properly is a module that interfaces...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
18 years ago

The tri-state and enabel look correct. But there doesn't appear to be a feedback path on the bidir pin(i.e. when the tri-state is in the high-Z state, how does external logic drive back into the device?)

Also, looking at what you sent, why does sram_data feed another tri-state? Does it go off chip? You only need one tri-state per bidir, not two.