Warning: Converting TRI node that feeds logic to an OR gate

Is this a schematic? Does the tri directly feed a bidir pin(with a feedback path)? The only tri-states in the devices are in the IO cells and directly feed the pin, so unless your design exactly matches that, it has to convert it to logic(the conversion to logic works nicely for internal tri-state conversion, but since you're really doing a bidirectional signal, then you want to make sure this goes away.) Can you attach/describe how this is connected?