Forum Discussion
Altera_Forum
Honored Contributor
17 years ago --- Quote Start --- Instantiate ram blocks..? You mean the array "MEM" need to be instantiated..? (Whatever that means..).. U mean, I cannot directly write data into the array..? <snip> cirutech: I've only tried Vector Waveform File simulator in Quartus. However, I am very keen in learning how to use SignalTap if that can help me in learning VHDL. Do you know of a good tutorial that I can follow..? Preferably one that explains by example.. --- Quote End --- Hi, for the memory , I am also using the megafunction to instatiate it, without writing vhdl. It performs good, you can instantiate ROMs and RAMs (also multiport). Check the related userguide. Anyway of course you can write (and read!) data into the array! About SignalTap (ST) it's an Embedded Logic Analyzer, useful when your FPGA is working. It probes the device's pins, showing you what is really happening in your design. No simulation, real behaviour! And the "solution" I described before is useful to me for both simulation and verification. I followed a tutorial from altera website, the online free ones. hope this helps, C