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Altera_Forum
Honored Contributor
12 years agoViewing Data in Bus Lines without I/O Pins in Waveform Editor [Newbie].
Hello everyone. I am still new in Quartus II and I'm trying to design a fully parallel 8-point radix-2 fft processor. I've already done some simulation with the university waveform editor to se...
Altera_Forum
Honored Contributor
12 years ago --- Quote Start --- You can use SignalTap to view signals inside your FPGA. Search on Altera's site for 'signaltap' or see the following tutorial: signaltap tutorial (ftp://ftp.altera.com/up/pub/altera_material/10.1/tutorials/verilog/signaltap.pdf) Regards, Alex --- Quote End --- Can it probe without an actual FPGA board? I only need to see the data in my bus lines in simulation after compiling.