VHDL type mismatch error

Looks like you are missing the point here. Use Quartus II compilation only for the design that goes inside the FPGA, i.e., SOPC Builder system with Nios II processor. Not with the peripheral components that you would like to be present on the board surrounding the FPGA. From system's perspective, all of the peripheral components (like cfi flash, sram, sdram, etc.) are simulation models to Quartus II synthesis/simulation flow. The core controllers (instantiated in SOPC builder) are the actual synthesizable part that is to be used by Quartus II synthesis flow. The memory models can be used when you simulate your design in ModelSim or any other simulation tool.