Altera_ForumHonored Contributor9 years agoVHDL JK FlipFlop Error, Please help Hello. As you can see in the figure 1, We can make a JK flipflop with 2 ANDs and 2 NORs and two internal signals. So I've written a very simple code in ModelSim to make and simulate a JK FlipF...Show Moremultiple-attachments.zip482 KB
Altera_ForumHonored Contributor9 years agoOh yes, thank you. I corrected that still don't work. This project got canceled.
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