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Altera_Forum
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15 years ago

VHDL: How to initialize RAM from file?

Good timings! I find in internet-space this vhdl codе: library IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.STD_LOGIC_ARITH.ALL; use IEEE.STD_LOGIC_UNSIGNED.ALL; USE IEEE.STD_LOGIC_...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Please raise this issue as a support request with Altera. I have previously requested it, and if others do, then maybe they will finally support it (like Xilinx do!)