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Altera_Forum
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13 years ago

VHDL getting Array elements with std_logic_vector

Hello, I'm having some trouble synthesizing my code, I'm running out of logic cells on my DE2 Altera board. I want to use the values from 4 std_logic_vectors(7 downto 0) to retrieve the e...
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Altera_Forum
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12 years ago

Are you using all of them? Your "registers" would only use 40 of the M4ks available.

What are you storing here? basically, you're not going to be able to store it in registers. And if you cant store it in M4K blocks, then your only choice is the external ram.