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Altera_Forum
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13 years ago

VHDL getting Array elements with std_logic_vector

Hello, I'm having some trouble synthesizing my code, I'm running out of logic cells on my DE2 Altera board. I want to use the values from 4 std_logic_vectors(7 downto 0) to retrieve the e...
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Altera_Forum
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12 years ago

FVM and Tricky

Thank you for responding.

I am currently using a Cyclone II EP2C70 device. The Handbook indicates that there are 68416 LE's.

So based on the above discussion of 160 X 120 8 bit registers would require 160*120*8 = 153600 LE's. But since device has only 68416 LE's this is practically impossible.

Am I correct.

My understanding is that each LE has 1 bit flip flop (1 programmable register)

Appreciate your feedback