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Altera_Forum
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12 years ago

VHDL Generator

Hello i've written a VHDL generator in Python ( https://github.com/andrecp/vhdl_gen ), feel free to use and give feedback! The idea is to generate the entity,architecture and signals from a simple...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

These tools are all fine as experimental tools, and Im sure work fine for smaller projects.

But I really dont see how they scale, without adding an extra level of complexity to an already large project. (ie. another tool to have to learn to use).

Unless they get some sort of mainstream support and use, I cant really see them catching on.