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Altera_Forum
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16 years ago

VHDL default signal state bug ?

We tried to do a very simple thing: a demultiplexer that enables one of several gates according to the state of an n-signal vector. (Just static, no Flipflops involved.) So we defined a 2^n sig...
Altera_Forum's avatar
Altera_Forum
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16 years ago

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this second method has no meaning, because you cannot xor an integer with anything, or invert it, or assing it directly to a std_logic_vector.

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Oops, no simple operations creating logical results from numerical values ?!?!?!

But if you cay a process does not harm, I do see how to proceed.

Thanks a lot for the VHDL introduction !!!

Michael (having noticed that C is a straight forward language :) )