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Altera_Forum
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16 years ago

VHDL default signal state bug ?

We tried to do a very simple thing: a demultiplexer that enables one of several gates according to the state of an n-signal vector. (Just static, no Flipflops involved.) So we defined a 2^n sig...
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Altera_Forum
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16 years ago

Please post the code, as it will make alot more sense than your explanation.