Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

VHDL code for 16 to 1 mux using Nand gates

can neone just tell me how i can implemnet it using structural.. because i have 16 gates involved inthis.. and only structural modelling will make it easier.. but i have to declare a component...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

but in structural architecture we can just decalre component, instantiate it, efine signal. but everything is done using component we can't define any value.assign any value ..

or can we..

if yes then how..

please elaborate..