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Altera_Forum's avatar
Altera_Forum
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15 years ago

VHDL code for 16 to 1 mux using Nand gates

can neone just tell me how i can implemnet it using structural.. because i have 16 gates involved inthis.. and only structural modelling will make it easier.. but i have to declare a component...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

ok, then all you need just connect nodes.

Quartus wouldn't let gating on ports so you can't use not there. Instead negate the node then connect e.g.:

sel1n <= not sel1;

then connect sel1n to the port