Vhdl 2008

When using a conditional in an IF statement, the ?? is not required. From the Doulos website:

"""VHDL-2008 introduces a new operator, ??. It ’s called the condition operator and it converts a STD_LOGIC expression to a BOOLEAN one: '1' and 'H' are considered TRUE and everything else FALSE. (It also converts BIT to BOOLEAN .) So you can now write this:

if ?? A and B then

...

or, even better ...

In certain circumstances, ?? is applied implicitly. The condition expression of an if statement is one of those. So you can indeed now write:

if A and B then

..."""

Technically, in my code that I initially listed, I left out the

THEN in the line:

if HRST then:

I had the THEN statement in my code, just didn't copy it.

This compiles fine in Aldec HDL where VHDL 2008 is checked

as the language version.

I am trying to find out if Quartus needs the ?? or can discern

that that the bit literal should be TRUE.