Verilog interview questions

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One of the things I asks during interviews is to explain the difference between blocking and non-blocking operators and when to use each. If they get that one wrong it usually means one of two things A) they haven't really used verilog/VHDL much or B ) they probably have poor coding habits.

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I believe VHDL doesn't know 'blocking or non-blocking assignments' see this http://www.sigasi.com/content/vhdls-crown-jewel (http://www.sigasi.com/content/vhdls-crown-jewel) So a perfectly expert VHDL programmer probably doesn't know (or perhaps couldn't care less) what 'blocking or non-blocking' is all about. (except that he may have to tweak/debug some Altera example/driver code ...)