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Altera_Forum's avatar
Altera_Forum
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17 years ago

Verify the EPCS code using Quartus

Hello, I'm trying to verify a JIC file that I programmed using Quartus and I'm getting an Error " Can't verify device". The FPGA is STII family. Do you have any idea how can I verify the code ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

It seems the jic file is not generated properly from sof file, it should show 'Factory default SFL image' in file column of first row and your device name in device column and in second row there should be path of your jic file and EPCS name in device column