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Altera_Forum's avatar
Altera_Forum
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15 years ago

vcd file creation in Quartus 10

Hi,

I am trying to do power analysis for which i need vcd file as an input. For this I enabled " Generate Value Change Dump(VCD) Script" in settings (EDA Tool settings ->Simulation ) of Quartus 10.1.

Is this enough to generate vcd file? In the output folder I see a vcd file with zero bytes after I am done simulating using Modelsim Altera. Is there anything wrong?Why am I getting a zero byte vcd file? (The simulation waveform indeed shows transitions)

Do I need to do something more in Modelsim console? Like this(http://www.ehow.com/how_5017235_create-vcd-file-modelsim.html) webpage says to run source <design>_dump_all_vcd_nodes.tcl in modelsim. When I do this I am getting this error :

The default VCD output file "<design>.vcd" is already opened. Use the 'vcd files' command to create multiple VCD files.

Can anyone help me with this...

Thanks,

Amjad

9 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    Ok am following this link now..

    http://www.altera.com/support/kdb/solutions/rd10272005_812.html

    now the size of vcd file is 1kb but i dont find any useful info regarding signal activity in it.....

    the file contents are :

    ---------------------------------------------------

    $date

    Tue Dec 28 22:20:00 2010

    $end

    $version

    ModelSim Version 6.6c

    $end

    $timescale

    1ps

    $end

    -----------------------------------------------------

    Any suggestion/advice as to what I am missing...?:(
  • Altera_Forum's avatar
    Altera_Forum
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    14 years ago

    Hi amjad163,

    What type of file that need to apply all the settings? It is main file or testbench file?
  • Altera_Forum's avatar
    Altera_Forum
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    14 years ago

    Hi amjad163,

    I face same problem to do the power analysis. I will try follow the link you give first. I will ask again if have problem. Thanks for reply
  • Altera_Forum's avatar
    Altera_Forum
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    14 years ago

    Hi amjad163,

    I have follow the steps in the link given and its look okay. But, when I try to simulate in ModelSim using command:

    source <design>_dump_all_vcd_nodes.tcl

    this error occur:# couldn't read file "haar_dump_all_vcd_nodes.tcl": no such file or directory

    I have check my output folder, the haar_dump_all_nodes.tcl file is there (exist). Why the error occur?..
  • Altera_Forum's avatar
    Altera_Forum
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    12 years ago

    Hi, I have the same problem where I have the following contents in the generated vcd file:

    $date

    Tue Dec 28 22:20:00 2010

    $end

    $version

    ModelSim Version 6.6c

    $end

    $timescale

    1ps

    $end

    I am using Verilog, and hence I do not have any 'Design instance name' as opposed to that of VHDL. Correct me if I'm wrong. Any idea here?
  • Altera_Forum's avatar
    Altera_Forum
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    12 years ago

    Hello,

    I had a qsys system generated successfully and I imported that in my quartus project. Currently, I don't have any test bench. Now I want to measure the power for this design. Can I do it without test bench as it requires the "design instance name"?

    And,

    VCD dumps right after compiling in quartus or do we need to run the "Value Change Dump File script" in modelsim to dump the .vcd file.??

    Please suggest.
  • Altera_Forum's avatar
    Altera_Forum
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    12 years ago

    Hello,

    Now I am able to dump the .vcd file. But when I import that .vcd in Quartus for Power Analyzer, the report shows:

    Total Thermal Power Dissipation 70.79 mW

    Core Dynamic Thermal Power Dissipation 0.00 mW

    Core Static Thermal Power Dissipation 47.36 mW

    I/O Thermal Power Dissipation 23.43 mW

    Power Estimation Confidence Low: user provided insufficient toggle rate data

    Is this dynamic+static power consumption of my design during execution ??

    If not, how to get that. And why I am getting the "Power Estimation Confidence" as Low ???

    Need Help. Kindly suggest.