Altera_Forum
Honored Contributor
15 years agoVariable inside and outside a process
Hi, I'm having an problem that all I can think about to solve this is to use a variable inside an component and on every clock, increment it.
With a loop it would also be possible, but I must increment by 8 and call a component inside a loop, what I believe isn't possible. Here's an example: LIBRARY ieee; USE ieee.std_logic_1164.all; PACKAGE matrizes IS TYPE array_t IS ARRAY (0 TO 63, 0 to 63) OF STD_LOGIC_VECTOR(7 DOWNTO 0); LIBRARY ieee; USE ieee.std_logic_1164.all; USE work.matrizes.all; ENTITY testt IS PORT (clk: in std_logic; inpp: in array_t; outpp: out array_t); END testt; ARCHITECTURE behavior OF testt IS VARIABLE a: INTEGER RANGE 0 to 64:=0; COMPONENT test IS PORT (inp: in STD_LOGIC_VECTOR(8 DOWNTO 0) outp: out STD_LOGIC_VECTOR(8 DOWNTO 0)); END COMPONENT Process(clk) Begin if rising_edge(clk) then a:=a+8; end if; end process; label_01: test PORT MAP (inpp(a, a), outpp(a,a)); END behavior; I believe this code will not compile. It's just an example. I must every 50us for example, increment by 8 the array index: label_01: test PORT MAP (inpp(a, a), outpp(a,a)); waits time label_01: test PORT MAP (inpp(a+8, a+8), outpp(a+8,a+8)); Hope you can understand what I mean. Thanks very much.