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Altera_Forum's avatar
Altera_Forum
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9 years ago

variable initialization help

Hi all, For a process, the variable only take the initial value at the first time the process is running, then it will take the last value of that variable. I am wondering how can I initial the...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
9 years ago

I suggest stepping away from the code, and drawing the design you expect on paper, or visio, or some diagram. Then, when you understand the circuit you expect, come back and write the VHDL. HDL is Hardware description language. If you dont know what hardware you expect, then you are unlikely to write good VHDL.

Merge sorts work best with lots of data in parrallel. With two rams, you are going to take a lot of clocks reading and re-reading the values.