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Altera_Forum
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11 years ago

Using (verilog2vhdl-converter)

Hello, i have code in Verilog and i need to convert it to VHDL. the code is below (http://www.terasic.com.tw/cgi-bin/page/archive.pl?language=english&categoryno=68&no=281&partno=3), for a DE2_1...
Altera_Forum's avatar
Altera_Forum
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11 years ago

Why do you need it converted? quartus can compile a project with both languages in it.