Using the cyclones internal clock as input for a circuit

Normally you don't use the clock itself as an input but rather a signal that is synchronized to the same clock. For example if there is a signal that you want to count how many clock cycles it was high for you would use the signal as a counter enable, and use the clock ... as a clock source. If you have a verilog or VHDL file open in Quartus you can go to the 'template' menu option and look that the example for a up counter with a count enable input to see what I mean. I'm sure if you search for "performance counter" you'll find other examples of the sort of thing I described.