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Altera_Forum
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12 years ago

Using System console for utilizing the USB debug master component in Qsys

Hi all I ve been working on Cyclone V soc development kit and intend to communicate through dedicated USB lines from the FPGA to the PC through the MAX II CPLD(USB Blaster II). I got recommendations to use the USB debug master in order to implement this but since i am a newbie to Tcl script and have time restrictions would like to know if there is a tcl script for testing this component with the set of commands for USB read and write.

Thanks in advance,

CG6991

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  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    12 years ago

    --- Quote Start ---

    Hi all I ve been working on Cyclone V soc development kit and intend to communicate through dedicated USB lines from the FPGA to the PC through the MAX II CPLD(USB Blaster II). I got recommendations to use the USB debug master in order to implement this but since i am a newbie to Tcl script and have time restrictions would like to know if there is a tcl script for testing this component with the set of commands for USB read and write.

    Thanks in advance,

    CG6991

    --- Quote End ---

    You can use Virtual JTAG to debug and test your fpga design. Virtual JTAG is one of Altera's megafunction, you can implement it like other free function by using megawizard.