Forum Discussion
Altera_Forum
Honored Contributor
9 years agoWhy dont you want to go back to coding? Block diagrams have many disadvantages over code:
1. You cannot simulate a block diagram (it has to be converted to HDL first) 2. Block diagrams are not portable between vendors 3. Block diagrams dont work very well with version control. Using a counter is possible to do anything - but I suggest not using the mod function - it implements a divider which may complete in a single clock and be very slow. And you should not generate a clock with logic anyway. It is much better practice to create a clock enable so that all logic uses the system clock, only enabled when required (every other clock, every third clock etc).