Using interface in top-level module in Quartus 17.1

interface some_interface (input A, output B);
endinterface
 
module top_module (some_interface X)
 //assign X.A=1;
 assign X.B=1;
endmodule

I can not assign 1 to X.A because X.A is an input. Compiller do not allow that.

But! In Pin Planner X.A and X.B directions are Bidir.

Is it normal for Quartus 17.1?

If not what shall I do to set X.A as in and X.B as out in Pin Planner?