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So my question is :Could I use the vqm file as an input of the fitter tool? if it is possible could you tell me how can i do it?
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I would not recommend using the tool to do the partitioning for you, even if it supports the flow.
The timing of I/O cells is significantly different than the internal logic. If the design fit entirely within a single FPGA, then your timing constraint would simply be a clock frequency. When partitioning between FPGAs, you need to constrain the outputs and the inputs.
You'll have much finer control over this if you partition the design yourself.
Cheers,
Dave
Honored Contributor
