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Altera_Forum
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16 years ago

used array to create a memory

because ALTERA IP scfifo time sequence a litter different from my requirment , so i had to write a FIFO myself. reg [DATA_WIDTH - 1 : 0] MEM [0 : DEPTH - 1]; // 16*8 ram i...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

Hi AllenFPGA,

depending on the resources on your FPGA, Quartus can synthesize the use of ram blocks like M4K for such array definitions. You can check this in the summary report as well as in RTL viewer in Quartus.