Hi I'd like to know if it is possible to upload a newly programmed configuration from a FPGA? I use the Quartus II 9.1 SP1 to program a .sof and .pof file into a FPGA. Is there any way that I can recover these .sof and .pof files from the FPGA? Apologies in advance for this noob question. Thanks, alteraQuartusUpload

No, there is no support for reading back either an .sof or .pof (other than the .pof verify option, but that does not give you an option to save to file). Cheers, Dave

Thanks for the quick response, Dave. I'm principally looking for a way to verify that the Quartus II programmer actually programmed the files in and was hoping that there might be a way to read back the files and then do a compare between these two files. *sigh* Perhaps there is another software that can do this? Thanks, alteraQuartusUpload

--- Quote Start --- Thanks for the quick response, Dave. I'm principally looking for a way to verify that the Quartus II programmer actually programmed the files in and was hoping that there might be a way to read back the files and then do a compare between these two files. *sigh* Perhaps there is another software that can do this? --- Quote End --- The .pof has a verify option. The .sof will fail to configure the device if there was an error. If your JTAG cable is good, you should not have any problems with configuring the devices. Cheers, Dave

If the files did not program in, then the Cong_done should not go high, and the nSTATUS should go low. (assuming you have pull up resistors on them. Optionally, you can also program a user IO pin to be INIT_DONE, and this will only go high after the FPGA is fully loaded, and has transitioned through Initialization into User Mode (the user design is now running on the FPGA).

I experimented a bit, it is possible to upload the .pof file from the FPGA using the Examine feature in the Quartus II Programmer. This works perfectly, to compare the downloaded and uploaded .pof files. But there seems to be no way to upload the .sof file. I'm most interested in verifying if the correct files were programmed in, not the status of the FPGA after programming. "The .sof will fail to configure the device if there was an error. -- Dave" : Do you mean if there was an error in the FPGA loading the .sof file then there would be an expected configuration error?

Uploading FPGA configuration | Altera Community

12 Replies

Altera_Forum
Honored Contributor
13 years ago
--- Quote Start ---
I am wondering if we can read Jic file from EPCS flash devices
--- Quote End ---

You can read the contents of the flash easily enough. Its just SPI flash.

You can instantiate an SPI controller or just PIO and access the flash directly. You just need to set the EPCS interface pins as "Use as regular I/O" so that you can connect them to your custom logic.

Cheers,
Dave
Altera_Forum
Honored Contributor
13 years ago
--- Quote Start ---
I am wondering if we can read Jic file from EPCS flash devices
--- Quote End ---

Please do not multipost. You already asked the question here (http://www.alteraforum.com/forum/showthread.php?t=37791) and even got an answer!

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Uploading FPGA configuration

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