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NTA's avatar
NTA
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3 years ago
Solved

University Program VWF Simulations in Quartus Prime Lite 21.1 vs Quartus II 13.x

Hello everyone,

I'm working on updating a university lab course from (old) Terasic DE1 boards and Quartus II 13.x to Terasic DE10-Lite boards and Quartus Prime Lite Edition 21.1.

While both software versions seem to be mostly identical, I can't get any simulations running. Everything else is working perfectly fine.

So far, the course has relied on the "University Program VWF Simulations" and the "Simulation Waveform Editor" for some very basic simulations. Is that no longer supported in Quartus 21.1?

In Quartus II there was an option for "Quartus II Simulator" in the simulation settings that needed to be selected, but I can't find anything comparable in Quartus Prime.

Since FPGAs are only one chapter of the entire course, we would like to keep it simple and therefore are hesitant to using the full version of Questa.

Where I'm currently stuck:

  • Quartus Prime Lite Edition 21.1 installed (and already reinstalled)
  • Extremely basic test project: Input (switch) -> NOT -> Output (LED)
  • Shortest possible file path for that project (no spaces or other special characters in file path)
  • "Questa - Intel FPGA Starter Edition 2021.2" is installed and linked to a local license
  • "Simulation Settings" are set to Default
  • Running the Functional/Timing Simulation leads to: "Error loading design"

Am I missing something?

Thank you all very much in advance!

Greetings from Germany,

NTA

  • DrNickels's avatar
    DrNickels
    3 years ago

    It still works. Here is a video I made for my class showing a simple circuit.

    The short of it is that you have to go to "simulation options" in the Simulation Waveform Editor and change 

    vsim -novopt
    to 
    vsim -voptargs="+acc".

16 Replies

  • DrNickels's avatar
    DrNickels
    Icon for Occasional Contributor rankOccasional Contributor
    3 years ago

    It still works. Here is a video I made for my class showing a simple circuit.

    The short of it is that you have to go to "simulation options" in the Simulation Waveform Editor and change 

    vsim -novopt
    to 
    vsim -voptargs="+acc".

    • NTA's avatar
      NTA
      Icon for New Contributor rankNew Contributor
      3 years ago

      Thank you so very much!

      I had almost given up on this feature.

  • Ash_R_Intel's avatar
    Ash_R_Intel
    Icon for Regular Contributor rankRegular Contributor
    3 years ago

    Hi,

    The -novopt option is being deprecated in recent Questasim versions. So, that cause the issue.


    Regards


    • sstrell's avatar
      sstrell
      Icon for Super Contributor rankSuper Contributor
      3 years ago

      Any idea how in the Questasim GUI to remove -novopt when compiling? I understand the change mentioned above for starting the simulation (vsim) but I still see -novopt when compiling (vlog) and get errors from it.

  • Ash_R_Intel's avatar
    Ash_R_Intel
    Icon for Regular Contributor rankRegular Contributor
    3 years ago

    Hi,

    I see that the case already has an accepted solution. Do you need any further support on this?


    Regards


    • NTA's avatar
      NTA
      Icon for New Contributor rankNew Contributor
      3 years ago

      Hello,

      thanks for asking, but the issue could be resolved with the instructions provided by DrNickels.

      I'm just curious how that bug has gone unnoticed by Intel for so long.

  • DrNickels's avatar
    DrNickels
    Icon for Occasional Contributor rankOccasional Contributor
    3 years ago

    It's in the Simulation/Simulation Settings window in the GUI.

    • DrNickels's avatar
      DrNickels
      Icon for Occasional Contributor rankOccasional Contributor
      3 years ago

      Ah. Sorry for misunderstanding. It is confusing that the simulator labelled "Simulation Waveform Editor" is called "vsim".

      When I use a testbench in Quartus and call Questa (Intel FPGA Starter Edition - not sure if that's different from "Questasim") from there, I get the correct flags, so can't offer any help there.

  • NTA's avatar
    NTA
    Icon for New Contributor rankNew Contributor
    3 years ago

    Just to add to the topic, as this piece of information might be useful to someone:

    The Max10-FPGA is not supported for Timing Simulations (neither is the Cyclone V). However, when selecting any CycloneIV model the Timing Simulation does work perfectly fine.

  • Ash_R_Intel's avatar
    Ash_R_Intel
    Icon for Regular Contributor rankRegular Contributor
    3 years ago

    Hi @sstrell,

    The IP generated simulation script offer 2 aliases: ld and ld_debug.

    ld_debug has the -voptargs=+acc option to the vsim command. Once the script is sourced, you can choose to use the ld_debug alias to start elaboration.


    Hope this helps.


    Regards


  • sstrell's avatar
    sstrell
    Icon for Super Contributor rankSuper Contributor
    3 years ago

    I'm not talking about generated scripts. I'm talking about going to Questasim, setting the directory to the location of the design files, and compiling the files from the Compile menu.

  • Ash_R_Intel's avatar
    Ash_R_Intel
    Icon for Regular Contributor rankRegular Contributor
    3 years ago

    Hi,

    I think older QuetaSim simulator had an option 'Enable Optimization' when you do 'Start Simulation'. But in newer version, the option has been removed. So, if someone wants to migrate from older versions to newer, they need to drop the option -novopt from vsim command.


    Regards


  • Ash_R_Intel's avatar
    Ash_R_Intel
    Icon for Regular Contributor rankRegular Contributor
    3 years ago

    Hi,

    As the queries has been answered, setting the case to closure. However, it will still be open for community members to comment.


    Regards