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Capricorn's avatar
Capricorn
Icon for New Contributor rankNew Contributor
2 years ago

Unconstrained record support Quartus Prime Standard 23.1 VHDL-2008

I have an array of an unconstrained record:

  type PinCtrlCfg is
  record
    PinMuxSelect            : std_logic_vector;
    EnableOutput            : std_logic;
  end record;

  type PinCtrlCfgArray is array (natural range <>) of PinCtrlCfg;

I'm trying to use it like this:

signal Cfg : PinCtrlCfgArray(NUM_OUTPUTS_G-1 downto 0)(PinMuxSelect(toLog2Ceil(NUM_INPUTS_G)-1 downto 0));

This works fine in Questa. However, when trying to synthesize in Quartus, I get the following error message: "object "PinMuxSelect" is used but not declared"

VHDL-2008 support is enabled.

Unconstrained arrays work fine, but are unconstrained records not supported in Quartus? I'm using Prime Standard 23.1.

Hdl

3 Replies

  • ShengN_altera's avatar
    ShengN_altera
    Icon for Super Contributor rankSuper Contributor
    2 years ago

    Hi,


    Questa is testbench based so there's different between the synthesis behavior of the Questa and Quartus. Some of the code Questa can compile but Quartus can't. You may try with other compiler tool and should get the same result.


    In VHDL, you cannot access or index into a record field like PinMuxSelect in the signal declaration. The signal declaration must refer to the entire record or array, not individual fields.


    For example appropriate one:

    signal Cfg : PinCtrlCfgArray(NUM_OUTPUTS_G-1 downto 0);

    ....

    for i in 0 to NUM_OUTPUTS_G-1 loop

    Cfg(i).PinMuxSelect <= std_logic_vector(to_unsigned(i, Cfg(i).PinMuxSelect'length));

    end loop;


    • Capricorn's avatar
      Capricorn
      Icon for New Contributor rankNew Contributor
      2 years ago

      Hi

      This is not what I'm trying to do. I'm specifying the size of PinMuxSelect, which is not constrained in the record.

      Here is a simplified example:

      signal Cfg : PinCtrlCfgArray(3 downto 0)(PinMuxSelect(7 downto 0));

      This is part of VHDL-2008 .

  • ShengN_altera's avatar
    ShengN_altera
    Icon for Super Contributor rankSuper Contributor
    2 years ago

    Hi,


    I had tried with other compiler tool and get the same synthesis error. That's not supported in synthesis tool.


    Thanks,

    Regards,

    Sheng