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Altera_Forum
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17 years ago

Unable to place RAM cells in design

Hi folks, I'm trying to work on an SoPC design. I've used my architecture as an IP and inserted it onto the SoPC having Nios II CPU, jtag-uart, interval timer, on chip memory, and a pio. I'm try...
Altera_Forum's avatar
Altera_Forum
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17 years ago

The 32 DPRAMs at 150 x 1 will use up 147456 ram bits because they are blocked off in 4k blocks plus parity. Each M4K is 4608 bits(4096 + 512 parity bits). Each of your DPRAMs will use one M4K, thus, 32 * 4608 = 147456 bits. Thats 61.5% of the available ram bits.