Altera_ForumHonored Contributor17 years agoUnable to place RAM cells in design Hi folks, I'm trying to work on an SoPC design. I've used my architecture as an IP and inserted it onto the SoPC having Nios II CPU, jtag-uart, interval timer, on chip memory, and a pio. I'm try...Show More
Altera_ForumHonored Contributor17 years agoSo you have 32 dprams, each is 1 bit wide and 150 bits deep?
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