Honored ContributorHi all,
I've a schematic project file (fifo, AND, OR blocks etc) that I would like to simulate to verify my results. I tried using ModelSim but I can't open the schematic file with it. Did i miss something? Thanks for your help!
Honored ContributorI don't think ModelSim supports schematic simulation...
Honored Contributoryou need to convert the schematic to verilog or VHDL before you can simulate it. You can do it via the file menu:
file -> create/update -> create HDL from current file.Honored ContributorTried it and it worked!
Thanks alot!Honored Contributorremember that you'll have to re-create the HDL every time you modify the schematic (and then recompile the code in modelsim).
