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Loopback's avatar
Loopback
Icon for New Contributor rankNew Contributor
2 years ago

Unable to generate simulation files for avalon memory mapped read, write and slave IP

I have an existing QPP project, where I want to generate simulation files, so that I can better understand the inter module communication and data flow. I'm getting following errors in the generate d...
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KennyT_altera's avatar
KennyT_altera
Icon for Super Contributor rankSuper Contributor
2 years ago

SStrel is right, the error message simply mean it is not supported for simulation.


What IP that you are using in the platform designer? Can you attached your design for us to have a look?