Forum Discussion
ContributorTypical timing analysis cyclone V (on top of existing slow/fast)?
Generally speaking, the slow timing model (what’s the slowest my design will run on the slowest device that met the speed grade, at the lowest voltage in spec and the highest temperature in spec) and the fast timing model(what’s the fastest my design will run on the fastest device, highest voltage and lowest temperature).
Ultimately, to ensure the reliability of your design, it is necessary to meet timing for all four timing corners.
The topic of timing models is quite complex, and I believe the best explanation can be found in the following document:
Hopefully that answer your inquiries.
Please let me know if you have any further questions or concerns.
Best Regards,
Richard Tan
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Super ContributorFast at 100C is not really the report you should be looking at. What does your Fast -40C report look like?
ContributorTemperature does not change much the timings results on the Cyclone V.
See histogram at -40C.
I was wondering if the IC (interconnect) is made out of wire + muxes or buffers that could explain why the values are doubled in slow vs fast.
Could a specialist at Intel react on that?
How would the typical values be, somewhere in between the fast and slow corner or ?
