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Altera_Forum
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14 years ago

Two SOPCs - SOPC#2 gives no jtag uart output

Hi guys,

I have a design that instantiates two different SOPCs, each containing its own NIOS II cpu and JTAG UART. I compiled a different C-app for each NIOS II.

Quartus compiles all OK, but when I run the design on hardware I get no JTAG UART output from SOPC#2 (I can connect to the cpu's JTAG debug module though).

When I recompile without SOPC#1, I do get output from SOPC#2.

Both generated system.h files (I'm using SOPC builder) list the correct (=different) UART names for the std_in/std_out definitions:

SOPC#1: system.h

# define ALT_STDIN "/dev/sopc1_jtag_uart"

SOPC#2: system.h

# define ALT_STDIN "/dev/sopc2_jtag_uart"

..so I'm lost as to what causes this problem. Any ideas?

18 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    14 years ago

    Added note: in ModelSim, I do get printf output from both SOPC systems as it should, so this is definately a Quartus issue.

  • Altera_Forum's avatar
    Altera_Forum
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    14 years ago

    You should be able to switch between the two using the -i command line argument like this:

    nios2-terminal -i 0

    nios2-terminal -i 1

    (assuming they are instance 0 and 1, look at the .jdi file to make sure) Typically when I'm looking at multiple UARTs I do this from the command line so that I can have multiple nios2-terminals open at once.
  • Altera_Forum's avatar
    Altera_Forum
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    14 years ago

    Hi,

    Maybe I was not clear enough, I can connect to both JTAG UARTs (indeed by passing the instance numbers as mentioned above by BadOmen), but the problem is that the JTAG UART of SOPC#2 does not output anything.
  • Altera_Forum's avatar
    Altera_Forum
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    14 years ago

    At the command line type this "jtagconfig -n". It'll report your JTAG cables, devices, and all the JTAG nodes in your FPGA(s). I'll be able to spot the JTAG UARTs in the output.

  • Altera_Forum's avatar
    Altera_Forum
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    14 years ago

    Yes, that does detect the JTAG UART (so it detects 2 JTAG debug instances and 2 JTAG UARTS in one FPGA). As said, I can connect to the JTAG UART, but it is not ouputting my printf messages.

  • Altera_Forum's avatar
    Altera_Forum
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    14 years ago

    hi guys .....

    i have a system with 2 cpu ...one running nios and another running linux.....

    i had some problens with 2 jtags.........and a solution ....remove 1 jtag and put a serial port :) voila!

    dont forget --instance=(your instance)

    try it

    Franz Wagner
  • Altera_Forum's avatar
    Altera_Forum
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    14 years ago

    --- Quote Start ---

    hi guys .....

    i have a system with 2 cpu ...one running nios and another running linux.....

    i had some problens with 2 jtags.........and a solution ....remove 1 jtag and put a serial port :) voila!

    dont forget --instance=(your instance)

    try it

    Franz Wagner

    --- Quote End ---

    2 jtags? Do you mean 2 JTAG devices (such as a JTAG debug core and a JTAG UART), or 2 JTAG UARTs?

    I assume using a serial port would require a hardware change?
  • Altera_Forum's avatar
    Altera_Forum
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    14 years ago

    --- Quote Start ---

    2 jtags? Do you mean 2 JTAG devices (such as a JTAG debug core and a JTAG UART), or 2 JTAG UARTs?

    I assume using a serial port would require a hardware change?

    --- Quote End ---

    In a project with two cpus is not a good idea use jtag for debug (only for signal tap). I had many problems with it.

    Today I use two serial ports for debug of cpus and just use the jtag to download programs.

    to use a serial port you only need put serial uart on sopc builder . sopc create to pins ..... tx and rx .... . you conect it on two external pins and put it on serial port of you machine (pc).......

    use db9 conector ........ pins 2 and 3..........(and conect the ground ....)

    cheers

    Franz Wagner
  • Altera_Forum's avatar
    Altera_Forum
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    14 years ago

    Thanks for the tip - i'll keep it in mind for another piece of hardware. For this project however, it is not possible to modify the hardware.

  • Altera_Forum's avatar
    Altera_Forum
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    14 years ago

    Running more than one driver on the same JTAG UART will cause problems (for example the wrong CPU might clear an interrupt without sending data).

    If you're running the basic HAL (it looks like you are) then the easiest way to fix this is to connect each UART only to the CPU you want to use it with - that will prevent the other CPU from interfering with the JTAG UART hardware.