Altera_Forum
Honored Contributor
12 years agotree structure
hii pls give an idea to implement a verilog code to construct a tree structure.Also an array reusing idea.because we need to reduce the array size each time.
Hello, I suggest this code:
module NodeType ( );
endmodule
module TreeTemplate ( );
parameter TREE_LEVEL= 4;
NodeType node();
generate
if ( TREE_LEVEL >0 )
begin
TreeTemplate# ( TREE_LEVEL-1 ) leftSubtree ( );
TreeTemplate# ( TREE_LEVEL-1 ) rightSubtree ( );
end
endgenerate
endmodule
I have used this principle in the implementation of sorting module. It was pleasant surprise, that one can make recursive modules in verilog.