Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

transmission gate with pmos and nmos

I've written a verilog code for a transmission gate using pmos and nmos primitives but it did not compiled in Quartus. How can I implement the nmos and pmos in Quartus knowing that the purpose of thi...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

The low level primitives in FPGA design are logic gates and IO cells, not transistors or transmission gates. You can't use them in synthesizable HDL.