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Altera_Forum
Honored Contributor
11 years agoTransceiver Toolkit Pattern Generator/Checker Memory Map
Hi all, I have modified and instantiated a 10G Transceiver example into a Stratix V FPGA. I have also incorporated the JTAG Master, Pattern Generator, and Pattern Checker. The design works well ...
Altera_Forum
Honored Contributor
11 years agoThanks Dave for sharing.