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Altera_Forum
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15 years ago

Toplevel Simulation Control Signal And Retain Post-Fit Netlist

I am working on a large CycloneIII design using QuartusII v9.0. In our design we have a toplevel input simulation control signal that is routed to various aspects of the design. This simulation...
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Altera_Forum
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15 years ago

Josyb:Apologies for missing the issue of pins.

Basstudio:

You might just use any register bit to drive the logic. This bit can be written to by nios or the memory editor...