Tool for VHDL/Verilog code documentation

Hi,

Can someone share experience on writing documentation for FPGA design? How do you write it?

I want to write documentation for FPGA project, describe which top modules are responsible for what, and main source files should also be documented.

The main purpose of this documentation should be that other designer can easily take and modify my project or quickly understand structure of my project.

I have found some tools for creating documentation like Doxygen and Sigasi. But Doxygen has only few features to support VHDL language and Sigasi is not free tool.

Thanks