Forum Discussion
Altera_Forum
Honored Contributor
18 years agoHello,
to my opinion, you can see already a lot in the Project Navigator / Hierarchy view, particularly if the design has some modularity. Another interesting view is the Resource Utilization by Entity in Compilation Report / Analysis & Synthesis. Combining both information, you see in detail what the resources are spent for, also the effect of design changes can be monitored. Basically, you have to get an understanding of the resource costs of typical HDL constructs in your design. Once you got it, you'll know in advance how many LEs e. g. a 32 bit adder or a businterface will consume. Regards, Frank