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Altera_Forum
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18 years ago

Tool for identifying resource consumption

Hi all ... I've got a project that's been built in Quartus II for a Cyclone III chip written in verilog. I'm trying to get a better handle on what's driving my LE consumption so that I ca...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
18 years ago

Rysc -

Thanks for the reply.

Actually the register side of the equation is making sense for me ... in fact the fitter doesn't seem to be generating as many duplicates as I would have thought.

The place where it seems to be using too many resources is on the LUT side. I have one module that's compiling to 1473 LUT Only, 23 Register Only and 449 LUT/Register combined LEs. The register side makes sense and there a number of adders and comparisons but the 1,473 still seems too large.

The code works fine. I'm just looking for a way to figure out what's consuming the LUTs short of breaking the module into a series of smaller ones just to figure where the resources are going.

I'm sure I've done some inefficient coding somewhere in there ... just looking for a way to narrow down where it is!

:)

V